ECE 5760 deals with system-on-chip and embedded control in electronic design. The course is taught by Bruce Land, who is a staff member in Electrical and Computer Engineering and Neurobiology and Behavior.
Final Projects | Policy | Assignments | Staff and Schedule | Links
ECE 5760 thanks:
- INTEL for their donation of laboratory computers.
- ALTERA for their donation of FPGAs and development hardware.
- TERASIC for timely technical support of their hardware.
Assignments
Lab Assignments
- 0. Introduction to the hardware and software (week of Sept 3)
- 1. SRAM state machine. One-dimensional cellular automaton (weeks of Sept 10, 17)
- 2. NiosII based, VGA video interface (weeks of Sept 24, Oct 1)
- 3. NiosII and MicroC/OS audio signal generator (weeks of Oct 8, 15)
- 4. NiosII and Digital Differential Analyzer (week of Oct 22)
- 5. Final Project (weeks of Oct 29 and Nov 5, 12, 19, 26)
Old lab assignments, ideas for labs
Reading Assignments
- Week of Aug 23:
- DE2 board, especially the Users Manual
- QuartusII tutorial for Verilog
- SOPC examples: Altera Design Contest winners (pdf)
- Review Synthesizable Verilog syntax from one of the links below, possibly Code Examples, or Synthesis Methodology
- Download and inspect the contents of the DE2 CDROM zip version 1.5 (Altera link)
- Week of Sept 3
- NiosII. Read enough so that you will know exactly where to find the data you need. I suggest Nios II Processor Reference Handbook chapters 1-4, and 8.
- NiosII tutorial
- DE2 hardware examples
- SRAM data sheet
- VGA DAC data sheet
- Week of Sept 10
- Nios II Software Developer's Handbook chapters 1-4, and 6.
- SOPC builder tutorial
- SDRAM tutorial
- Week of Sept 17
- Week of Sept 24
Schedule and Staff
-
Lecture: MWF 1115-1205 Phillips ???
-
Lab Sections (238 Phillips):
DayTimeTAThursday1330-1630???Friday1330-1630??? -
Office Hours (in lab) :
-
DayTimeStaffThursday1330BruceFriday1330Bruce
- Bruce Land, 607-254-4346, BRL4@cornell.edu
- TA: ???
Links
- Cornell staff-maintained pages
- Final Projects and some ideas
- DE2 hardware examples
- NiosII assembler examples
- NiosII GCC examples
- NiosII MicroC/OS examples
- FPGA as an Digital Differential Analyzer (Analog Computer)
- DSP on FPGA
- ALTERA Literature and DE2 resources
- QUARTUS II design software
- VERILOG in QUARTUS II, Simulation, Timing, SignalTap
- Memory Init File (mif) format
- Recommended HDL style
- Synchronous one-read, one-write, 2-port memory 6-16
- Synchronous two-read, one-write, 3-port memory 6-19
- Synchronous ROM, 6-23
- Tristate devices 6-36, Do not use for internal signals. 6-36
- Latches 6-40
- System on a programmable chip (SOPC) builder
- Megafunctions
- DE2 prototype board
- DE2 CDROM zip version 1.5 (Altera link)
- DE2 datasheets
- PIN assignment csv file
- Top level Verilog shell
- DE2 resources (Hamblen, GATech)
- Terasic (makes the DE2)
- DE2 tutorials and exercises
- NiosII
- CycloneII FPGA specs, details
- Other courses using Altera for SOPC
- GeorgiaTech, Hamblen, instructional materials
- UIUC ECE598 SOC
- UMass Amherst ECE354
- NiosII Operating systems and Languages
- lcc, the retargetable C compiler
- Nios microCLinux and Wiki
- MicroC/OS RTOS
- Book by Labrosse
- on NiosII
- Nios source code (NOT NiosII)
- introduction (Tei-Wei Kuo, National Taiwan University)
- introduction Zworld
- API summary and another summary
- Complete API
- RTOS introduction (KTH)
- KROS Real-Time Suite for the Altera Nios
- RTEMS Wiki and home page
- FreeRTOS Wiki and home page
- HAL introduction (KTH)
- newlib C-library
- CPU and IP cores
- opencores.org
- fpgacpu.org and links
- One Instruction machines
- P-URISC one instruction ISA and VHDL
- Ultimate RISC
- Six different machines
- Wikipedia
- Evaluation of Synthesizable cores
- Microarchitecture of FPGA based soft processors
- Soft Core Processors and Embedded Processing: a survey and analysis
- A Study of the Speedups and Competitiveness of FPGA Soft Processor
- RISC16 (Bruce Jacob, UMD)
- WISC-SP06 (CS/ECE552 Wisconsin)
- DLX/MIPS ( Trinity College Dublin, Jeremy Jones )
- DLXview (Purdue)
- System-on-chip (Jan Gray)
- Synthesizable MIPS core in verilog (MIT SCALE group)
- MIPS core (Lafayette, ECE313)
- Kraken 16-bit RISC (Stanford) and other past projects
- 16-bit RISC (ECE813 MSU)
- DFT IP generator (CMU, Peter A. Milder for the SPIRAL Project )
- Software radio (Altera)
- Software radio (Virginia Polytech, John C. Davies IV)
- AIZUP 8-bit core (FCCM 1996) 1998 datapath and VHDL: single cycle, fetch/execute, pipelined, plus assembler def
- Eclectic list of computer architectures David Cary
- FPGApple
- FPGA for Fun -- Digital Scope
- RetroMicro FPGA
- CD16 soft CPU
- EE475 (my 1998 version)
- Verilog
- verilog.org
- verilog.net
- verilog.com and IEEE standard
- Synthesizable Verilog Examples
- Verilog manual (CSCI320, Bucknell)
- Verilog tutorial (asic-world)
- Reference manual ( Rajeev Madhavan, Automata Publishing )
- Quick Reference (Sutherland HDL)
- Verilog synthesis methodology (Finbarr O’Regan (finbarr@ee.ucd.ie))
- Verilog HDL coding (Freescale)
- Altera Design Examples
- Binary to BCD converter
- General design information
- Proverbs and quotations
- It’s Time to Stop Calling Circuits “Hardware”
- John Kent's FPGA page
- Teaching with FPGAs (Edwards, Columbia)
- glossy version
- student projects 2005, 2004
- 2006 class
- DSP/math
- Video/Graphics
- Video Chips
- Using the MC6847 Video Controller (MIT)
- MC6847 data sheet
- ELM data sheet
- NTE879 RGB encoder
- SAA1101 synch generator
- TDA8501 PAL/NTSC encoder
- MC13077 encoder
- AD722 encoder
- LM1881 sync separator (national) and EL1881 synch separator (intersil)
- TV tutorials
- TinyGL graphics
package
- Analog, Analog to Digital, and D to A
- Practical Analog Design (from Circuit Cellar)
- Guide to instrumentation amplifier design (analog devices)
- Single power supply opamp circuits (TI)
- Micropower circuts (Linear Technology)
- Single supply amplifier (EDN)
- Discover Circuits
- Analog-input circuit serves any microcontroller (EDN magazine12/20/2001)
- National Semiconductor
- Texas Instruments
- Dallas Semiconductor/Maxim
- Field-programmable Analog Arrays (FPAA)
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